HOME | DD

Description
A schematic plan of a VHDL Designed Digital Clock. This is the first more complex Computer Chip I developed. (I had some problems with other programs who couldn't properly compile the VHDL code.)

Description
A schematic plan of a VHDL Designed Digital Clock. This is the first more complex Computer Chip I developed. (I had some problems with other programs who couldn't properly compile the VHDL code.)